Doc: Update out-dated info about Juno's mailbox

Since commit 804040d106, the Juno port has moved from per-CPU mailboxes
to a single shared one. This patch updates an out-dated reference to
the former per-CPU mailboxes mechanism in the Firmware Design.

Change-Id: I355b54156b1ace1b3df4c4416e1e8625211677fc

diff --git a/docs/firmware-design.md b/docs/firmware-design.md
index 7ae1de32541c0b3100a926371f5145e795a07def..d0cb39943de3a69e1e0f3e822f7b245812b67211 100644 (file)
--- a/docs/firmware-design.md
+++ b/docs/firmware-design.md
@@ -1204,9 +1204,9 @@ The following list describes the memory layout on the ARM development platforms:
     Trusted SRAM. The amount of Trusted SRAM available to load the bootloader
     images is reduced by the size of the shared memory.
 
-    The shared memory is used to store the entrypoint mailboxes for each CPU.
-    On Juno, this is also used for the MHU payload when passing messages to and
-    from the SCP.
+    The shared memory is used to store the CPUs' entrypoint mailbox. On Juno,
+    this is also used for the MHU payload when passing messages to and from the
+    SCP.
 
 *   On FVP, BL1 is originally sitting in the Trusted ROM at address `0x0`. On
     Juno, BL1 resides in flash memory at address `0x0BEC0000`. BL1 read-write